GA Optimized Binary Tree SVM for Analog Circuit Fault Diagnosis

Bao Yu Dong; Guang Ren

doi:10.4028/www.scientific.net/AMM.235.423

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vol. 235GA Optimized Binary Tree SVM for Analog Circuit...

GA Optimized Binary Tree SVM for Analog Circuit Fault Diagnosis

Abstract:

This paper presents a novel method of analog circuit fault diagnosis based on genetic algorithm (GA) optimized binary tree support vector machine (SVM). The real-valued coding genetic algorithm is used to optimize the binary tree structure. In optimization algorithm, we use roulette wheel selection operator, partially mapped crossover operator, inversion mutation operator. In simulation experiment, we use Monte-carlo analysis for 40kHz Sallen-Key bandpass ﬁlter and get transient response of ten faults. Then we extract feature vector by db3 wavelet packet transform and principal component analysis (PCA), and diagnose circuit faults by different SVM methods. Experiment results show the proposed method has the better classification accuracy than one-against-one (o-a-o), one-against-rest (o-a-r), Directed Acyclic Graph SVM (DAGSVM) and binary tree SVM (BT-SVM). It is suitable for practical use.

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Periodical:

Applied Mechanics and Materials (Volume 235)

Pages:

423-427

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.235.423

Citation:

Cite this paper

Online since:

November 2012

Authors:

Bao Yu Dong, Guang Ren

Keywords:

Analog Circuit, Fault Diagnosis, Genetic Algorithm (GA), Support Vector Machine (SVM)

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References

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